Basics of paging

Paging is a memory management scheme that eliminates the need for contiguous allocation of physical memory and thus helps in handling fragmentation. It involves breaking down memory into fixed-size blocks called pages and frames. The OS typically decides the page size when the system is configured or during the OS design phase. This page size is constant for the entire system and is determined based on considerations such as hardware architecture, efficiency, and the type of applications running. Common page sizes are 4 KB, 8 KB, or 16 KB.

Here's a simple explanation with an example:

Basic Concepts

  • Page: A fixed-size block of logical memory (virtual memory) used by a process.
  • Frame: A fixed-size block of physical memory (RAM) where a page is mapped.
  • Page Table: A data structure used by the operating system to keep track of the mapping between pages and frames.
  • The Page Table Base Register (PTBR) is a special register in the CPU that holds the starting address of the page table for the currently running process. When a context switch occurs (e.g., switching from process P1 to process P2), instead of modifying the entries in the page table of P1, the CPU simply updates the Page Table Base Register (PTBR) to point to the starting address of the page table for P2. This way, the CPU can quickly switch between different processes without needing to change the entire page table.

How Paging Works

  • Divide Memory into Pages and Frames: Logical Memory (Virtual Memory): Suppose a process requires 8 KB of memory, and the system uses a page size of 4 KB. The process’s memory is divided into 2 pages (Page 1 and Page 2).
  • Physical Memory (RAM): RAM is divided into 4 KB frames.
  • Page Allocation: Page 1 might be loaded into Frame 5 in physical memory. Page 2 might be loaded into Frame 8 in physical memory.
  • Page Table Entry: The operating system maintains a page table for each process. For example, the page table entry for Page 1 would indicate that it is located in Frame 5, and Page 2 is located in Frame 8.

In the above image, the process is divided into 4 pages, starting from page 0, each page is 16 KB in size. Let's take a logical address represented in binary as 011001.
  • The first two bits (01) represent the page number, which is page 1 (since 01 in binary is 1 in decimal). It is represented by p.
  • The last four bits (1001) represent the offset within that page. In this case, 1001 in binary is 9 in decimal. It is represented by d.
To find the specific memory location, you add this offset (9) to the base address of page 1. If the base address is 16 KB, adding 9 gives you the exact position within physical memory, which corresponds to the logical address 25.

In the physical address, let's say the value at logical address 25 is stored at physical address 121. When converting 121 to binary, we get 1111001.
  • The first three bits (111) represent the frame number, which is frame 7 (since 111 in binary is 7 in decimal).
  • The last four bits (1001) represent the offset within that frame, which is 9 in decimal.
To find the specific memory location, you add this offset (9) to the base address of frame 7. If the base address is 112, adding 9 gives you the physical address 121.


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